? 1999 fairchild semiconductor corporation ds010194 www.fairchildsemi.com february 1989 revised november 1999 74ac520 ? 74act520 8-bit identity comparator 74ac520 74act520 8-bit identity comparator general description the ac/act520 are expandable 8-bit comparators. they compare two words of up to eight bits each and provide a low output when the two words match bit for bit. the expansion input i a = b also serves as an active low enable input. features compares two 8-bit words in 6.5 ns typ expandable to any word length 20-pin package outputs source/sink 24 ma act520 has ttl-compatible inputs ordering code: device also available in tape and reel. specify by appending suffix letter ?x? to the ordering code. logic symbols ieee/iec connection diagram pin descriptions fact ? is a trademark of fairchild semiconductor corporation. order number package number package description 74ac520sc m20b 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300 ? wide body 74ac520pc n20a 20-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300 ? wide 74act520sc m20b 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300 ? wide body 74act520sj m20d 20-lead small outline package (sop), eiaj type ii, 5.3mm wide 74act520pc n20a 20-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300 ? wide pin names description a 0 ? a 7 word a inputs b 0 ? b 7 word b inputs t a = b expansion or enable input o a = b identity output
www.fairchildsemi.com 2 74ac520 74act520 truth table h = high voltage level l = low voltage level note 1: *a 0 = b 0 , a 1 = b 1 , a 2 = b 2 , etc. logic diagram please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. applications ripple expansion parallel expansion inputs outputs i a = b a, b o a = b la = b (note 1) l la h ha = b (note 1) h ha h
3 www.fairchildsemi.com 74ac520 74act520 absolute maximum ratings (note 2) recommended operating conditions note 2: absolute maximum ratings are those values beyond which damage to the device may occur. the databook specifications should be met, with- out exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. fairchild does not recommend operation of fact ? circuits outside databook specifications. dc electrical characteristics for ac note 3: all outputs loaded; thresholds on input associated with output under test. note 4: maximum test duration 2.0 ms, one output loaded at a time. note 5: i in and i cc @ 3.0v are guaranteed to be less than or equal to the respective limit @ 5.5v v cc . supply voltage (v cc ) ? 0.5v to + 7.0v dc input diode current (i ik ) v i = ? 0.5v ? 20 ma v i = v cc + 0.5v + 20 ma dc input voltage (v i ) ? 0.5v to v cc + 0.5v dc output diode current (i ok ) v o = ? 0.5v ? 20 ma v o = v cc + 0.5v + 20 ma dc output voltage (v o ) ? 0.5v to v cc + 0.5v dc output source or sink current (i o ) 50 ma dc v cc or ground current per output pin (i cc or i gnd ) 50 ma storage temperature (t stg ) ? 65 c to + 150 c junction temperature (t j ) pdip 140 c supply voltage (v cc ) ac 2.0v to 6.0v act 4.5v to 5.5v input voltage (v i )0v to v cc output voltage (v o )0v to v cc operating temperature (t a ) ? 40 c to + 85 c minimum input edge rate ( ? v/ ? t) ac devices v in from 30% to 70% of v cc v cc @ 3.3v, 4.5v, 5.5v 125 mv/ns minimum input edge rate ( ? v/ ? t) act devices v in from 0.8v to 2.0v v cc @ 4.5v, 5.5v 125 mv/ns symbol parameter v cc t a = + 25 c t a = ? 40 c to + 85 c units conditions (v) typ guaranteed limits v ih minimum high level 3.0 1.5 2.1 2.1 v out = 0.1v input voltage 4.5 2.25 3.15 3.15 v or v cc ? 0.1v 5.5 2.75 3.85 3.85 v il maximum low level 3.0 1.5 0.9 0.9 v out = 0.1v input voltage 4.5 2.25 1.35 1.35 v or v cc ? 0.1v 5.5 2.75 1.65 1.65 v oh minimum high level 3.0 2.99 2.9 2.9 output voltage 4.5 4.49 4.4 4.4 v i out = ? 50 a 5.55.495.4 5.4 v in = v il or v ih 3.0 2.56 2.46 i oh = ? 12 ma 4.5 3.86 3.76 v i oh = ? 24 ma 5.5 4.86 4.76 i oh = ? 24 ma (note 3) v ol maximum low level 3.0 0.002 0.1 0.1 output voltage 4.5 0.001 0.1 0.1 v i out = 50 a 5.5 0.001 0.1 0.1 v in = v il or v ih 3.0 0.36 0.44 i ol = 12 ma 4.5 0.36 0.44 v i ol = 24 ma 5.5 0.36 0.44 i ol = 24 ma (note 3) i in (note 5) maximum input leakage current 5.5 0.1 1.0 av i = v cc , gnd, a inputs only i ih maximum input high leakage current 5.5 10.0 10.0 av i = v cc , b inputs only i il maximum input low leakage current 5.5 ? 0.3 ? 0.6 ? 1.0 ma v i = v cc , b inputs only i old minimum dynamic 5.5 75 ma v old = 1.65v max i ohd output current (note 4) 5.5 ? 75 ma v ohd = 3.85v min i cc maximum quiescent supply current 5.5 4.0 40.0 av in = v cc i cc (note 5) maximum quiescent supply current 5.5 2.3 4.8 8.0 ma v in = gnd
www.fairchildsemi.com 4 74ac520 74act520 dc electrical characteristics for act note 6: all outputs loaded; thresholds on input associated with output under test. note 7: maximum test duration 2.0 ms, one output loaded at a time. symbol parameter v cc t a = + 25 c t a = ? 40 c to + 85 c units conditions (v) typ guaranteed limits v ih minimum high level 4.5 1.5 2.0 2.0 v v out = 0.1v input voltage 5.5 1.5 2.0 2.0 or v cc ? 0.1v v il maximum low level 4.5 1.5 0.8 0.8 v v out = 0.1v input voltage 5.5 1.5 0.8 0.8 or v cc ? 0.1v v oh minimum high level 4.5 4.49 4.4 4.4 vi out = ? 50 a output voltage 5.5 5.49 5.4 5.4 v in = v il or v ih 4.5 3.86 3.76 v i oh = ? 24 ma 5.5 4.86 4.76 i oh = ? 24 ma (note 6) v ol maximum low level 4.5 0.001 0.1 0.1 vi out = 50 a output voltage 5.5 0.001 0.1 0.1 v in = v il or v ih 4.5 0.36 0.44 v i ol = 24 ma 5.5 0.36 0.44 i ol = 24 ma (note 6) i in maximum input 5.5 0.1 1.0 av i = v cc , gnd leakage current i ih maximum input 5.5 10.0 10.0 a v i = v cc high leakage current b inputs only i il maximum input 5.5 ? 0.3 ? 0.6 ? 1.0 ma v i = v cc low leakage current b inputs only i cct maximum 5.5 0.6 1.5 ma v i = v cc ? 2.1v i cc /input i old minimum dynamic 5.5 75 ma v old = 1.65v max i ohd output current (note 7) 5.5 ? 75 ma v ohd = 3.85v min i cc maximum quiescent 5.5 4.0 40.0 a v in = v cc supply current or gnd i cc maximum quiescent 5.5 2.3 4.8 8.0 ma v in = gnd supply current
5 www.fairchildsemi.com 74ac520 74act520 ac electrical characteristics for ac note 8: voltage range 3.3 is 3.3v 0.3v voltage range 5.0 is 5.0v 0.5v ac electrical characteristics for act note 9: voltage range 5.0 is 5.0v 0.5v capacitance v cc t a = + 25 ct a = ? 40 c to + 85 c symbol parameter (v) c l = 50 pf c l = 50 pf units (note 8) min typ max min max t plh propagation delay 3.3 4.0 7.5 11.5 3.0 13.0 ns a n or b n to o a = b 5.0 2.5 5.5 8.5 2.0 9.5 t phl propagation delay 3.3 4.5 8.0 12.0 3.5 13.5 ns a n or b n to o a = b 5.0 3.0 5.5 9.0 2.5 10.0 t plh propagation delay 3.3 3.5 5.5 8.5 2.5 9.5 ns i a = b to o a = b 5.0 2.5 4.5 6.5 2.0 7.0 t phl propagation delay 3.3 3.5 5.5 8.5 2.5 9.5 ns i a = b to o a = b 5.0 2.5 4.5 6.5 2.0 7.0 v cc t a = + 25 ct a = ? 40 c to + 85 c symbol parameter (v) c l = 50 pf c l = 50 pf units (note 9) min typ max min max t plh propagation delay 5.0 3.0 5.5 8.5 2.5 9.5 ns a n or b n to o a = b t phl propagation delay 5.0 3.0 6.0 10.0 2.5 11.5 ns a n or b n to o a = b t plh propagation delay 5.0 2.0 4.0 6.0 2.0 6.5 ns i a = b to o a = b t phl propagation delay 5.0 2.5 5.0 7.5 2.0 8.5 ns i a = b to o a = b symbol parameter typ units conditions c in input capacitance 4.5 pf v cc = open c pd power dissipation capacitance 40 pf v cc = 5.0v
www.fairchildsemi.com 6 74ac520 74act520 physical dimensions inches (millimeters) unless otherwise noted 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300 ? wide body package number m20b
7 www.fairchildsemi.com 74ac520 74act520 physical dimensions inches (millimeters) unless otherwise noted (continued) 20-lead small outline package (sop), eiaj type ii, 5.3mm wide package number m20d
www.fairchildsemi.com 8 74ac520 74act520 8-bit identity comparator physical dimensions inches (millimeters) unless otherwise noted (continued) 20-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300 ? wide package number n20a fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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